T40n intelligent video application processor battery camera SOC

T40N Data table of intelligent video application processor

One 、 summary

T40N It is an intelligent video application processor , Suitable for mobile cameras 、 Security and other video equipment investigation 、 Video chat 、 Video analysis, etc . The SoC An innovative architecture is introduced to meet the requirements of high-performance computing and high-quality image and video coding, which is solved by video equipment .T40N Provide high speed CPU Ability to calculate , Excellent image signal process ,fluent 3840x2160 Resolution video recording .

CPU（ Central processing unit ） The core , Equipped with 32kB Instructions and 32kB Data L1 cache , as well as 128kB～1024kB Configurable L2 cache , Working frequency 900MHz, Full function MMU Functions and operating system related tasks .CPU The core of the core is XBurst-2 Processor engine .XBurst-2 It is an industry-leading microprocessor core , Provide excellent high performance and first-class low power consumption . One is with IEEE754 2008 and MIPS32 Compatible hardware floating point units ISA R5 plus MIPS SIMD Instruction set architecture ： It also includes 512bit MSA.

VPU（ Video processing unit ） The core is a video encoder engine , Used to process video streams HEVC（ISO/IEC 23008-2 Efficient video coding ） and AVC（ISO/IEC 14496-10） Advanced video coding ） standard . It also supports the use of JPEG Still picture coding standard （ITU T.81）. Used with on-chip video acceleration engine and post image processing T40N The unit provides high video performance . Maximum resolution 4096x4096, The format is encoding support AVC.H.264 the height is 40Mbit/s,H.265 the height is 20Mbit/s,[email protected]

ISP（ Image signal processor ） Core support up to 3 Times the image processing sensor . Support DVP、MIPI and TOF sensor . have 3A、2D and 3D Denoising and other functions ,WDR/HDR、 Lens coloring, etc . It can provide the highest resolution for the following objects 3840x2160 Image ： View or encode to store or transmit . For faster and easier use T40N,DDR2-KGD Integrated on a chip .

On chip module , Such as audio codec 、 Multichannel SAR_ADC The controller and camera interface provide designers with a set of economical video application peripherals . WLAN 、 Bluetooth and via high speed SPI and eMMC/SD/SDIO The host controller supports expansion options . in addition USB OTG、MAC、UART and SPI And other peripheral devices and general system resources provide enough computing and connection capabilities for many applications .

Two 、 performance ：
1.2.1CPU With as much as 900MHz Of XBurst2. Dual core , Double issue .
●MIPS32 ISA R5 High performance and low power implementation of MIPS32 ISA R5 plus Ingenic SIMD512 ISA
● With simultaneous multithreading （SMT） Double problems 、 Superscalar 、 Each physical core of the super pipeline has four instructions, and two hardware threads obtain the double problem instructions of each thread every cycle 32K L1 D cache 32K L1 I cache ,128 ~ 1024K L2 Cache high-performance floating-point units and SIMD engine ：FSE 32x512 Bit register set ,512 Bit loading / Store in SIMD unit , Or from SIMD Unit loading / Storage conforms to IEEE-754 2008
● Programmable memory management unit （MMU）1 Class micro TLB（MTLBs）-8x2 Input instruction TLB,16x2 input data TLB Level second TLB:32x2 Input VTLB,256x2 Input 4 Road set .XBurst2 The processor system only supports little endian

1.2.2MCU 450MHz RISC-V Coprocessor
● 32 position , The order ,5 Stage assembly line core 32K L1 Cache and 32K L1 D cache RV32IM Instruction set architecture T40N Data sheet of intelligent video application processor all rights reserved 2005-2022 Ingenic Semiconductor Co., Ltd. reserves all rights . Junzheng summary

1.2.3 Al Engine built-in neural network accelerator typical performance ：8TOPS Support int16/int8/int4/int2 Bit width
● share 1MB Memory pool Magik Al The algorithm development platform is available 1.2.4 Al Coprocessor （AlU）
● Color conversion
● Resize
● Hardware matrix operation

1.2.5 Video processor unit （VPU） Same core . Support H.264/H.265/JPEG Combined encoder . real time H.265/H.264 Coding function ：[email protected] Support the highest 4096x4096 Maximum resolution of .800 Mega pixels JPEG snapshot

1.2.6 Image signal processor （ISP） Of JPEG snapshot . Support the most 3 Sensors support MIPI and DVP Interface sensor . Support maximum resolution 3840x2160 3A（ Auto exposure / Automatic white balance / Autofocus ）, And it can output statistical information, green equalization, black level correction, lens coloring correction, lens distortion correction . dynamic / Static defect pixel correction Demosaic. A two-dimensional / Three dimensional color correction gamma correction brightness / Contrast / saturation / Tone adjustment adaptive dynamic range compression · Defogging .WDR. Adaptive local contrast enhancement sharpens two-dimensional / 3D denoising . Chromaticity noise reduction 3 Independent image magnification / Shrink the engine

1.2.7 Display the process controller （DPU）.MIPI-DSI The display size of four channel interface is up to [email protected]·SLCD The size of the controller display is up to [email protected],24BPP Support display panels of different sizes
●RGB The display size of the controller is up to [email protected],24BPP Support input format ,argb888,ARGB1555.RGB888、RGB565、RGB555:YUV422 YUV420 Support 4 Mode parallel interface ,24 position 、18 position 、16 Bit and 8 position （ third time ） Support frame buffer clipping and dithering
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